Congatec, a leading provider of embedded and edge computing technology, has launched a carrier board design training programme. The programme provides best-practice knowledge on the design-in of the leading computer-on-module standards COM-HPC and SMARC and is aimed at system architects. The aim of the programme is to give participants a quick, easy and efficient insight into the design rules of these PICMG and SGET standards. By participating in the programme, system architects should be able to develop carrier boards for embedded computer systems more effectively and thus shorten the time-to-market of innovative products.
With congatec training courses, developers can design more effective carrier boards for their embedded systems
congatec’s training courses provide developers with a comprehensive introduction to the mandatory and recommended design principles and best practice layouts of carrier boards for computer modules. The courses enable developers to start their own carrier board design projects and become familiar with standards-compliant carrier board designs that are essential for building interoperable, scalable and durable custom embedded computing platforms. The congatec Training Academy is available worldwide and offers both online and on-site courses. The training programme is aimed at developers at OEMs, VARs and system integrators and provides them with the necessary know-how to design effective carrier boards for their embedded systems and thus reduce the time-to-market of their products.
With regard to the official design guides of the standardisation bodies, Daniel Stadler emphasises that they are a great resource for developers, but ultimately they are only requirements specifications. To start real development projects, developers need to learn how to put these requirements into practice. The congatec training programme is specifically designed to accelerate knowledge transfer and provide developers with the necessary know-how to successfully launch their own carrier board designs. After completing the training, developers will be able to design effective and standards-compliant carrier boards for their embedded systems and shorten the time-to-market of their products.
The new carrier board design training programme from congatec offers developers a comprehensive insight into the world of high-end embedded and edge computing. The programme provides knowledge on all aspects necessary for successful carrier board design, such as PCB layout principles, power management rules, signal integrity and component selection. Special attention is given to computer interfaces, which are essential for sophisticated high-speed serial communication designs. The programme covers topics such as PCIe Gen 5, USB 3.2 Gen 2 and USB 4 with Thunderbolt, USB C, Ethernet and 100GbE. The management of sideband signals that need to be deserialised for COM-HPC on the carrier board is also covered in detail to give developers a comprehensive understanding of carrier board designs.
In addition to the design principles and best practice layouts for carrier boards for computer modules, the course also explains how to use interface standards such as eSPI, I²C and GPIOs. An introduction to congatec’s x86 firmware implementation, ranging from embedded BIOS to board management and module management controller functions, rounds off the design-in sessions. Developers will also learn verification and testing strategies to overcome all challenges from initial carrier board design verification to mass production testing.
The congatec training academy offers carrierboard design courses for the COM-HPC and SMARC standards, which are only accessible as part of a service subscription. With successful participation, participants receive a certificate confirming their ability to become an expert in carrierboard design. The courses offer participants the opportunity to gain in-depth knowledge and practical experience in the implementation of design principles and best practice layouts to develop their own carrierboard designs.
